Fiber Optic Tech
Introduction: When Computing Is No Longer the Only Bottleneck, Optical Interconnects Become Critical
Artificial intelligence is driving a new wave of infrastructure upgrades in data centers. From large language model training to inference for models with trillions of parameters, and from GPU clusters to large-scale AI supernodes, computing performance continues to advance. Yet a critical question is emerging: As computing power grows, can data transmission keep pace? In large-scale AI clusters, GPUs, AI accelerators, memory, and network switches must continuously exchange massive volumes of data. Traditional electrical interconnects face increasing challenges in bandwidth, transmission distance, and power consumption. As signaling rates rise, the equalization, compensation, and retiming circuits required to maintain signal integrity also increase system complexity and power requirements. Against this backdrop, optical interconnects are moving beyond conventional device-to-device communications toward integration closer to the computing chip. The combination of Co-Packaged Optics (CPO) and advanced packaging is emerging as a key development direction for next-generation AI data center interconnects.
1. What Is CPO, and Why Does AI Need It?
The core concept of CPO is to integrate optical engines within the same package as high-performance switching chips or other computing chips, bringing optical-electrical conversion as close as possible to the data-processing core. In conventional architectures, pluggable optical transceivers are typically installed on the front panel of a switch. High-speed electrical signals travel from the switching ASIC through package connections and PCB traces before reaching the optical transceiver, where they are converted into optical signals. As bandwidth increases, this electrical path faces increasingly stringent signal-integrity and power-efficiency requirements. CPO moves the optical engine closer to the switching chip, shortening the electrical transmission path before data travels over optical fiber.
This architectural shift offers three potential advantages:
· Reducing High-Speed Electrical Interconnect Power
High-speed electrical signals experience losses over longer transmission paths, requiring equalization, retiming, and other signal-conditioning techniques to maintain signal quality. By shortening the electrical connections between the chip and optical engine, CPO can reduce some of this signal-conditioning overhead and improve energy efficiency per bit.
· Increasing Bandwidth Density
AI switching networks must accommodate growing aggregate bandwidth within limited physical space. Integrating optical engines closely with switching ASICs creates opportunities to overcome some of the constraints associated with front-panel pluggable transceivers, including port density, cabling, and thermal management.
· Supporting Larger AI Clusters
As the number of computing nodes increases, inter-node communication becomes an increasingly important factor in overall training efficiency and cluster scalability. CPO could provide a new approach to high-bandwidth, energy-efficient optical interconnects, helping network infrastructure better accommodate the evolving demands of AI clusters.
It is important to note that CPO does not mean all conventional pluggable optical transceivers will be replaced immediately. Pluggable optics continue to offer advantages in serviceability, upgrade flexibility, and ecosystem maturity. Different optical interconnect architectures are likely to coexist, depending on bandwidth requirements, deployment scenarios, cost, and operational needs.
2. Advanced Packaging: A Key Enabler for Scaling CPO
If photonic technology determines whether efficient optical-electrical conversion can be achieved, advanced packaging determines whether different chips, optical components, and interconnect structures can work together reliably within a limited space. CPO is not simply a matter of placing an optical module next to a switching chip. It requires coordinated engineering across chip architecture, package design, optical coupling, electrical connectivity, thermal management, testing, and manufacturing.
2.1 Heterogeneous Integration: Bringing Electronic and Photonic Chips Together
Advanced packaging enables chips manufactured using different processes and designed for different functions to be integrated into a compact system. For example, electronic integrated circuits (EICs) handle high-speed electrical signal processing, while photonic integrated circuits (PICs) perform functions such as optical signal generation, modulation, and detection. High-density electrical interfaces enable these components to operate together. Depending on the architecture, the system may also incorporate laser sources, driver circuits, transimpedance amplifiers (TIAs), and other functional components. Technologies such as 2.5D packaging, silicon interposers, and chiplet integration can shorten inter-chip connections and increase system integration density. More advanced 3D heterogeneous integration may provide additional opportunities for even denser electronic-photonic integration. However, different integration approaches involve trade-offs in manufacturing complexity, thermal management, yield, testing, and cost. The optimal solution depends on the specific application.
2.2 Fiber Coupling: Precision at the Micron Scale Matters
Compared with conventional electronic packaging, optical packaging places different demands on alignment precision and interface quality. Photonic chips must connect to external optical paths through optical fibers, fiber arrays, or other optical interfaces. Coupling position, alignment angle, end-face quality, and mechanical stability can all affect optical transmission efficiency. As optical engine channel counts increase and package dimensions shrink, fiber coupling and alignment become more challenging. Low-loss coupling, high-precision alignment, reliable fiber fixation, and assembly processes suitable for volume manufacturing are therefore essential to scaling CPO. This creates important opportunities for fiber arrays, micro-optical components, optical interfaces, and precision assembly technologies throughout the CPO supply chain.
2.3 Thermal Management: A Critical System-Level Challenge
CPO places optical engines close to high-power switching ASICs. However, the performance of optical devices can be sensitive to temperature variations. Package design must dissipate heat generated by high-power chips while controlling local temperature gradients to minimize potential adverse effects on laser sources, modulators, and other optical components. This requires coordinated consideration of chip placement, heat-sink design, packaging materials, thermal expansion, and cooling methods. Thermal management must be addressed from the initial architecture and design stages rather than treated as an afterthought.
2.4 Testing and Reliability: From Laboratory Demonstration to Volume Production
CPO integrates multiple critical functions within a single package, meaning that a problem in any component or interface can affect overall system performance. The industry therefore needs comprehensive testing and validation across chips, optical engines, packaged components, and complete systems. Relevant parameters include optical power, insertion loss, bit error rate (BER), temperature stability, mechanical reliability, and long-term operating performance. At the same time, post-packaging repairability, known-good-die screening, automated assembly, and high-volume manufacturing yield will directly influence commercial competitiveness. The real value of advanced packaging lies not simply in achieving higher integration density, but in making high-performance optoelectronic systems repeatably manufacturable, testable, verifiable, and deployable at scale.
3. How Will CPO Transform AI Data Center Interconnect Architectures?
CPO is significant not only because it shortens an electrical path, but also because it encourages the industry to rethink the relationship between computing, switching, and optical interconnects.
From Pluggable Optics to Near-Packaged Optics and CPO
Optical interconnect technology is evolving toward progressively higher levels of integration.
· Pluggable Optics: Optical-electrical conversion takes place in transceivers mounted on the equipment's front panel. This approach benefits from a mature supply chain and relatively straightforward maintenance and replacement.
· Near-Packaged Optics (NPO): Optical engines are positioned close to switching or computing chips but remain physically separate from the main chip package.
· Co-Packaged Optics (CPO): Optical engines are integrated into the same package as the main chip, further shortening high-speed electrical interconnects.
These approaches should not be viewed as a simple sequence in which each technology completely replaces its predecessor. They offer different trade-offs in system power, optical interfaces, maintenance, manufacturing cost, and deployment complexity. The appropriate choice depends on the network architecture and application requirements.
From Component-Level Optimization to System-Level Co-Design
In traditional architectures, computing chips, switching chips, and optical transceivers can be designed and upgraded relatively independently. In CPO architectures, packaging, optical interfaces, thermal management, and high-speed electrical design become much more closely interconnected. As a result, next-generation AI data center design will increasingly shift from optimizing individual components to optimizing the entire system. For example, network designers must uate switching capacity, optical engine count, fiber connectivity density, link energy efficiency, and maintenance strategies together. CPO can deliver its full value only when these factors collectively meet system requirements.
4. The CPO Supply Chain: Where Are the New Opportunities?
The development of CPO will drive innovation across semiconductors, photonic integration, precision optics, and system integration.
| Supply Chain Segment | Key Technologies and Products | Main Development Priorities |
|---|---|---|
| Photonic Chips | Silicon photonics PICs, modulators, photodetectors | Higher integration, speed, and lower optical loss |
| Electronic Chips | Drivers, TIAs, high-speed switching ASICs | High-speed signal processing and lower power consumption |
| Optical Sources | Continuous-wave lasers, external laser sources | High reliability, stable output, and serviceability |
| Optical Components | Optical isolators, fiber arrays, micro-optics | Low loss, precision coupling, and high-density integration |
| Advanced Packaging | 2.5D/3D packaging, heterogeneous integration, optical-electrical co-packaging | High-density interconnects, thermal management, and improved yield |
| Fiber Connectivity | Fiber arrays, optical connectors, precision coupling structures | Higher channel density, reliable connections, and automated assembly |
| Testing and Systems | Optoelectronic testing, reliability validation, switching system integration | Automated testing, manufacturability, and system-level validation |
It is important to recognize that different CPO architectures have different requirements for laser placement, optical engine composition, and passive optical components. For example, a design using external laser sources may require a different component configuration and maintenance strategy from one that integrates laser sources within the package.
Consequently, CPO opportunities are not concentrated in a single chip or packaging process. They span the entire optical-electrical interconnect ecosystem. Companies with strengths in precision optics, passive optical components, optoelectronic integration, and scalable manufacturing can all find opportunities to participate in this industry transition.
5. From Optical Chips to Optical Networks: The Value of GLSUN's Portfolio
The development of CPO further highlights the importance of collaboration across the photonics supply chain. As optical interconnects move closer to chip-level and package-level integration, competition is no longer determined solely by individual component specifications. It increasingly depends on coordination among chips, optical components, modules, packaging processes, and complete systems.
GLSUN has established a presence across several optical communications segments, including active and passive optical components, optical chips, and optical switching technologies. This portfolio provides a foundation for collaboration across multiple product categories, from optical chips and components to modules and system-level solutions.
As AI data centers demand greater interconnect bandwidth, optical-path flexibility, and system integration, this broader industry positioning becomes increasingly relevant. First, passive optical components remain important to reliable optical links. Components such as optical isolators suppress reflected light in appropriate optical paths, helping protect optical sources and improve link stability. As high-speed optical transceivers and photonic integration continue to evolve, these components must meet increasingly demanding requirements for insertion loss, size, and reliability. Second, optical chip and component capabilities support broader optoelectronic integration. CPO involves multiple functions, including optical signal generation, modulation, transmission, and detection. Companies with expertise in optical chips and components can continue developing products and collaborating with ecosystem partners to address these evolving requirements. Third, optical switching provides another important pathway for AI data center network evolution.
CPO primarily addresses optical-electrical interconnects near chips, whereas Optical Circuit Switching (OCS) focuses on dynamically configuring optical paths at the network level. These technologies operate at different layers and are not direct substitutes for each other. In suitable system architectures, optical interconnects and dynamic optical-path reconfiguration can address complementary networking requirements.
For GLSUN, continued collaboration across active and passive optical components, optical chips, optical switching, and system solutions can help the company respond to the evolving needs of AI data centers and next-generation optical communication networks. It should be noted that a broad product portfolio does not automatically constitute a complete, production-ready CPO solution. The suitability of individual products for CPO packaging must be uated against customer architectures, device specifications, packaging interfaces, reliability requirements, and joint validation results.
6. The Future of CPO: Opportunities and Challenges
Although CPO offers significant potential, several challenges must be addressed before it can achieve broader commercial adoption.
· Manufacturing and Packaging Yield
Integrating multiple chips and optical structures into a single package increases process complexity and the need for coordinated quality control.
· Maintenance and Serviceability
Compared with pluggable modules, replacing or repairing optical engines inside a package can be more complicated. Architectures using external laser sources may offer alternative maintenance options.
· Standardization and Supply Chain Maturity
Optical interfaces, package structures, testing methods, and system integration approaches must continue to mature to reduce interoperability challenges and coordination costs across suppliers.
· Total Cost and Real-World Energy Efficiency
The value of CPO cannot be assessed solely by measuring the power consumption of the optical engine. Switching chips, laser sources, cooling systems, packaging, testing, and maintenance must all be considered when uating overall cost and energy efficiency. The commercialization of CPO will therefore depend not on a single technological breakthrough, but on the combined maturity of chip design, advanced packaging, precision optics, manufacturing and testing, and system architecture.
Advanced Packaging Brings Optical Interconnects Closer to the Computing Core
The next wave of AI development requires not only more powerful computing chips, but also interconnect infrastructure capable of supporting the rapid movement of massive volumes of data. CPO brings optical engines closer to switching and computing chips, while advanced packaging provides the foundation for high-density integration of electronic and photonic components. Together, these technologies have the potential to unlock new improvements in bandwidth density, transmission energy efficiency, and system scalability for next-generation AI data centers. At the same time, optical chips, passive optical components, fiber connectivity, optical switching, and system integration will create new opportunities for technological collaboration across the photonics industry. As AI competition expands from individual chip performance to overall system efficiency, optical interconnects are becoming a critical infrastructure technology—and advanced packaging is a key bridge connecting photonics and electronics.
GLSUN will continue to explore the convergence of photonics technologies and AI data center interconnect requirements. Building on its portfolio of active and passive optical components, optical chips, and optical switching technologies, GLSUN aims to work with industry partners to explore new possibilities for high-performance optical networks.